1. Field of the Invention
The invention relates generally to a method of manufacturing semiconductor memory devices and, ore particularly, to a method of forming a dielectric layer of a flash memory device using a remote plasma atomic layer deposition method.
2. Discussion of Related Art
A flash memory device of semiconductor devices is a nonvolatile memory device in which information stored in memory cells can be maintained although power is not supplied and high-speed electrical erase is possible with it being mounted in a circuit board. Much research has been done into the flash memory device due to its structure advantageous for high-integration.
A cell gate of the flash memory device has a lamination structure of a tunnel oxide film, a floating gate, a dielectric layer, and a control gate. The dielectric layer has a lamination structure of a lower oxide film, a nitride film, and an upper oxide film, and has a great effect on the program, erase, and read of the cell.
In the related art dielectric layer, the lower oxide film and the upper oxide film are formed using dichlorosilane (SiH2Cl2) (DCS) or monosilane (SiH4) (MS)—based chemical vapor deposition (CVD). The oxide film formed by such chemical vapor reaction is problematic in that it has a film quality lower than that of an oxide film formed by typical and wet oxidization and has a low step coverage of 85% or less.
Furthermore, as semiconductor devices have become more highly integrated, a thickness of the lower oxide film, the nitride film, and the upper oxide film (i.e., the general structure of the dielectric layer) is reduced. Accordingly, a problem arises because the leakage current and/or the reliability characteristic are degraded.
As a solution for solving these problems, research has been done into metal oxide having a dielectric constant higher than that of the oxide film or the nitride film as substitution materials of the next-generation devices. In other words, if the dielectric constant is high, the physical thickness required to produce the same capacitance can be increased. Accordingly, in the effective oxide thickness (EOT), the leakage current characteristic and the charge retention characteristic can be improved compared with the oxide film.
A method of depositing the high-k material may include a physical deposition method (PVD), CVD, and so on. In the case where a floating gate is formed of an amorphous silicon film when a high dielectric material is deposited by the related art PVD or CVD, a thick silicate film is formed during annealing after a thin silicate interface is formed between the high dielectric material and the amorphous silicon film. However, there are problems in that the silicate film formed as described above is not uniform and has a low film quality since a thickness cannot be controlled.